ASSP for video bridging supports variety of MIPIs

Expanding the CrossLink programmable ASSP (pASSP) family, Lattice Semiconductor has added three IP and two demonstration platforms to enable new video bridging capabilities.

The IP optimises existing CrossLink IP to save logic resources and lower power consumption; the demonstration platforms showcase MIPI DSI to LVDS and CMOS to MIPI CSI-2.

CrossLink was designed to address the challenges of a rapidly changing I/O landscape, says the company. CrossLink can be used for simple interface conversion, merging and muxing of image sensors, application processors and displays.

“The new CrossLink IP and solutions will enable our customers to adopt cameras and displays with the latest mobile interface technology to reduce overall system cost, power and size, while accelerating the design cycle of their next-generation products,” said C.H. Chee, senior director of marketing, mobile & consumer division at Lattice Semiconductor. “As inventors of the first programmable bridging device, and the world’s fastest MIPI D-PHY bridging device, Lattice is committed to delivering a low cost bridging solution with the highest bandwidth, lowest power and smallest footprint.”

One of IP introductions is the one to one output MIPI CSI-2 camera interface bridge, which enables better connectivity and improved signal integrity over connectors, large PCBs and flex cabling. It also provides programmability for data packet repair or additional packet transmissions. There is also a one input to two output MIPI CSI-2 camera splitter bridge, which enables video data from a single image sensor to go to two sources. The third IP introduction is the 4:1 MIPI CSI-2 camera aggregator bridge. It allows four CSI-2 cameras to be connected to a single CSI-2 interface on the processor. Two image sensors are merged together in a left/right format. A GPIO pin can multiplex between the two sets of merged image sensors.

The first technology demonstration platform is a CMOS to MIPI CSI-2 camera bridging demonstration. It connects a popular image sensor with MIPI DPI CMOS-type pixel bus to the CSI-2 input on the application processor. A MIPI DSI to LVDS display bridging demonstration connects the applications processor to a dual link LVDS display. A MIPI DSI to LVDS interface bridging demonstration connects mobile application processors to large format LVDS displays. It demonstrates the ability for industrial displays to interface to high volume, high performance mobile application processors.

The CrossLink evaluation boards with the new IPs are available now from the company and its distributors.

http://www/latticesemi.com

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