Cadence and UMC collaborate to adopt integrated digital flow certification
Semiconductor foundry, United Microelectronics Corporation (UMC) and EDA provider, Cadence Design Systems, have optimised and certified the Cadence digital full flow for the UMC 22ULP/ULL process technologies. This will help customers accelerate consumer, 5G and automotive application design, says Cadence. The flow, which incorporates implementation and sign-off technology for low power designs, enables mutual customers to achieve a faster path to tapeout.
The Cadence digital full flow that has been optimised for use on UMC’s 22ULP/ULL process technologies includes the Innovus implementation system, Genus synthesis solution, Liberate characterisation, Quantus extraction solution, Tempus timing signoff, the litho physical analyzer and physical verification system.
Some of the flow’s key capabilities that enable 22ULP/ULL design are the design implementation and optimization engines. They are fully integrated from RTL to GDSII, enabling users to achieve power, performance and area (PPA) goals and reduce time to market.
Another capability is the optimal signoff convergence. Cadence offers the only digital flow with fully integrated place-and-route, timing signoff, physical verification and IR drop / power signoff capabilities. According to Cadence these provide “unparalleled last-mile design closure” with the fewest iterations to facilitate the timely delivery of advanced-node products.
UMC replaced its incumbent library characterisation tool with Cadence Liberate Characterization, which is the foundation of the broader digital full flow and enables advanced timing and power analysis, optimisation and signoff flows, says the company.
“Our 22ULP/ULL platform is ideal for a wide variety of semiconductor applications, including power- or leakage-sensitive consumer chips and wearable products that require longer battery life,” said Y.H. Chen, director of the IP development and design support division at UMC. “
Talking about the collaboration with UMC, Kam Kittrell, senior product management group director of Cadence’s Digital & Signoff group, said: “Mutual customers can adopt our certified digital reference flow and UMC’s 22ULP/ULL low-power technologies and begin design work immediately . . . This certification allows UMC customers to leverage the most advanced low-power tool feature sets for synthesis, place-and-route, and signoff, enabling customers to design innovative applications with confidence.”
The Cadence digital full flow provides customers with a fast path to design closure and better predictability and supports the company’s Intelligent System Design strategy, which enables advanced-node SoC design.
