MCUs include Core Independent Peripherals to free up CPU

10 8bit MCUs in the PIC18F K40 family are the first PIC18 family members to offer Microchip’s Core Independent Peripherals (CIPs).

The MCUs range from 16 to 128kbyte of Flash memory with package options covering 28 to 64 pins. CIPs provide developers with the ability to accomplish tasks in hardware whilst freeing-up the CPU to do other tasks or go to sleep, saving power consumption, allowing for deterministic response time, decreasing firmware development and the time need for validation. The PIC18F K40 features the ADC with Computation (ADC2), an intelligent ADC which, independent of the core, can control data-acquisition and signal-analysis functions required in sensor interface applications, such as capacitive touch sensing.

The cost-effective devices offer up to 128kbyte of Flash, 5V operation, EEPROM and peripheral integration. There are CPIs for safety-critical applications (CRC, memory scan, windowed watchdog timer, and hardware limit timer), up to seven hardware PWMs and multiple communications interfaces. There are also Intelligent Analogue peripherals including Zero Cross Detect (ZCD), on-chip comparator and ADC2. The ADC2 handles the signal analysis functions of averaging, filtering, oversampling and automatic threshold comparison independent of the CPU.

Target applications and market segments include touch sensing, industrial control, consumer, automotive and the Internet of Things (IoT).

The PIC18F K40 family is supported by the Curiosity High Pin Count (HPC) board and software development platforms including MPLAB Code Configurator (MCC), MPLAB IDE, XC8 Complier, and the new, cloud-based IDE MPLAB Xpress.

Package options include UQFN (4x4x0.5mm), QFN, SOIC, SSOP, TQFP, and DIP.


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