Mentor packages system co-design in single Xpedition IC package design
According to Mentor Graphics, the Xpedition IC packaging design caters for design across the industry, encompassing IC, package, and printed circuit board (PCB) co-design and optimisation.
As next-generation high-density advanced packaging (HDAP) designs become more common, Mentor believes that new technologies for system-level co-design are needed for multi-substrate visualisation, planning, and optimisation.
Mentor announced the Xpedition HDAP flow for end-to-end advanced IC package design, from rapid prototyping to GDS signoff. Combining Xpedition, HyperLynx, and Calibre technologies, the flow enables exploration and optimisation of HDAP designs before detailed implementation, cutting weeks off existing methodologies.
Xpedition IC packaging design is for HDAP rapid prototyping assembly, physical design, verification, signoff, and modeling. It has been created for co-design to ensure multi-fabric system design success, as the worlds of IC design and packaging design converge. Emerging technologies such as fan-out wafer-level packaging (FOWLP), silicon interposers, chip on wafer on silicon (CoWoS), and wafer on wafer (WoW) require both sides to work together to optimise the entire system, not just the individual elements, points out Mentor.
Proven by companies like Intel and TSMC, among others, Xpedition is claimed to deliver the industry’s most comprehensive integrated solution for HDAP.
HDAP design and verification presents challenges that traditional design tools and methodologies cannot solve. By bringing package and IC design together with tools that can operate in both the IC and packaging domain, the Xpedition HDAP flow enables co-operation and collaboration between design houses, foundries, and electronic design automation (EDA) vendors.
Benefits of the Xpedition HDAP flow are a reduction in design cycles and ECO changes. These are brought about by enabling the early, rapid, and accurate exploration and optimisation of HDAP designs prior to detailed implementation.
It also achieves die-package-PCB optimisation in an efficient, predictable process, and performs ‘what-if’ prototype evaluations in hours, rather than days or weeks, removing connectivity errors and accelerating cycle time.
Xpedition enables a flexible, multi-direction flow for die, package, or PCB-driven device optimisation. This is a significant improvement over today’s typical single-direction flow, according to Mentor.
Xpedition also provides integrated in-design detailed checking using HyperLynx DRC, reducing the final verification and sign-off process. It also offers the shortest path and cycle time to full GDS, LVS, and LVL sign-off through integration with Calibre.