PCI Express 5.0 verification IP is a first, says Cadence

Believed to be the industry’s first Verification IP (VIP) in support of the new PCI Express (PCIe) 5.0 architecture, Cadence announces that the VIP incorporates TripleCheck technology, which lets designers quickly and thoroughly complete functional verification of server and storage SoC designs based on the PCIe 5.0 specification. Using the VIP, says Cadence, designers can enjoy added confidence that designs can function as originally intended.

The Cadence VIP has supported all recent PCIe standards and is now further optimised for the new 5.0 specification. It means that adopters of the PCIe 5.0 specification have access to the Cadence TripleCheck technology, which provides a verification plan with measurable objectives linked to the specification features and a comprehensive test suite with thousands of ready-to-run tests to ensure compliance with the specification. This saves design time and delivers higher quality end-products, says Cadence. Additionally, designers have access to the Indago Protocol Debug app, which provides protocol-specific interactions between the design, the VIP and the testbench to find the root cause of any design bugs.

The VIP is part of the Cadence Verification Suite and is optimised for Xcelium parallel logic simulation, along with supported third-party simulators. The PCIe 5.0 VIP supports the company’s System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently. The Verification Suite is comprised of core engines, verification fabric technologies and solutions that increase design quality and throughput, fulfilling verification requirements for a variety of applications and vertical segments.

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud data centre, automotive, aerospace, IoT, industrial and other market segments.



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