PLL has low power consumption for IoT radio
An all digital phase locked loop (ADPLL) has been presented by Imec, Holst Centre and Rohm for IoT radio transceivers.
A PLL is traditionally one of the major power consumers in a radio and can take up to 30 per cent of the radio area, but this ADPLL has a small area of just 0.18mm² in 40nm CMOS and low power consumption of 0.67mW. All spurs are lower than -56dBc and jitter is below 2ps.
Power consumption reduction, especially in wireless connectivity, is one of the leading challenges in low power radio design. The PLL has traditionally been an analog component for frequency synthesis. All-digital PLLs enable a smaller footprint, better control and testability, and improved scaling to advanced CMOS nodes, but have lagged behind in terms of performance, compared to analogue PLLs.
Imec and Rohm’s ADPLL supports all specifications of Bluetooth Low Energy radios while significantly reducing cost and power consumption, say the pair. The divider less fractional-N digital PLL features a power-efficient spur-mitigation technique and a digital phase unwrap technique.