RF technology reduces 5G power consumption

Described as a disruptive integration and architectural breakthrough for 5G wireless, Xilinx announces the infusion of RF-class analogue technology into its 16nm All Programmable MPSoCs.

The All Programmable RFSoCs eliminate discrete data converters, providing 50 to 75 per cent power and footprint reduction for 5G massive-MIMO and millimeter wave wireless backhaul applications.

According to the company, the integration of high performance ADCs and DACs in an All Programmable SoC, radio and wireless backhaul units can now meet previously unattainable power and form factor requirements, while increasing channel density. Additionally, it says that RFSoC devices allow manufactures to streamline design and development cycles to meet 5G deployment timelines.

The integrated 16nm-based RF data conversion technology includes direct RF sampling for simplified analogue design, greater accuracy, smaller form factor, and lower power. 12bit ADCs have up to 4Gample/s, high channel count, with digital down-conversion and 14bit DACs offer up to 6.4Gsample/s, and high channel count, with digital up conversion.

FinFET technology is claimed to blend high integration density with improvements in analogue device performance characteristics. Integrating RF signal processing into All Programmable SoCs enables customers to change their systems architectures, for continuous, breakthroughs in system integration and to enable 5G customers to commercially deploy highly differentiated, large-scale, massive-MIMO and millimeter-wave backhaul systems.   



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