XJTAG says free software for PADS Schematic Design increases DFT and debug capabilities
Free software for PADS Schematic Design has been created by XTAG. It will, says the company, significantly increase the design for test (DFT) capabilities of the schematic capture and PCB design environment.
PCBs are becoming more densely populated and access to pins under many packages, such as ball grid array (BGA), is virtually impossible, says XJTAG. JTAG was designed to solve the problem of access and so it is now important to get the JTAG chain right at the design stage. Failure to identify and fix design errors early in the development cycle can result in a board re-spin and a costly delay to a project. The XJTAG DFT Assistant helps validate correct JTAG chain connectivity, through full integration with the PADS schematic capture environment.
PADS products now include the XJTAG DFT Assistant that provides engineers with a free, easy to use interface to check if JTAG chains are correctly connected and terminated at the schematic capture stage, long before the PCB is produced. By detecting and correcting these faults earlier, companies save both time and money. The software is free for PADS users of VX.2.1 or higher and can be downloaded from the XTAG website.
The XJTAG DFT Assistant comprises of two key elements; the XJTAG Chain Checker, and the XJTAG Access Viewer.
XJTAG Chain Checker identifies common errors in a JTAG scan chain, such as incorrectly connected test access ports (TAPs). A single connection error would inhibit an entire scan chain from working. XJTAG Chain Checker identifies connection errors and reports them to the developer during the design process. Incorrectly terminated TAPs are also identified.
XJTAG Access Viewer overlays the extent of boundary scan access onto the schematic diagram, allowing users to instantly see which components are accessible using boundary scan, and where test coverage could be further extended. Engineers can highlight the nets individually to show read, write, power/ground and the nets that do not have any JTAG access on the schematic.
While the first prototype is being manufactured, XJTAG DFT Assistant allows engineers to export a preliminary XJTAG project from Mentor Graphics’ PADS schematic capture environment to the XJTAG development software, where additional tests can be developed. These can then be used to test real hardware, as soon as it is available, providing a new capability to electronic engineers.
Mentor Graphics provides electronic hardware and software design and manufacturing solutions, offering products, consulting services and support for electronic, semiconductor and systems companies. It is headquartered in Wilsonville, Oregon, USA.
XJTAG supplies JTAG boundary-scan hardware and software tools. The company focuses on product development and high quality technical support. XJTAG products use IEEE Std.1149.x (JTAG boundary-scan) to enable engineers to debug, test and program electronic circuits quickly and easily. This can significantly shorten the electronic design, development and manufacturing processes.