3U VPX module is “forward looking” for wideband comms and radar
The Jade family of high-performance data converter 3U VPX modules based on the Xilinx Kintex Ultrascale FPGA, from Pentek, now include the Model 54141A. This dual channel ADC and DAC has sample rates up to 6.4GHz. Programmable digital down converters (DDCs) and digital up-converters (DUCs) support connections to IF or RF signals.
“The 54141A combines our popular 7114A XMC module with a 3U VPX carrier, yielding a powerful, forward-looking package for very wideband communications or radar applications that require advanced I/O resources,” said Rodger Hosking, vice-president of Pentek.
It complies with the VITA 65.0 3U VPX specification and also offers flexible analogue and digital interface options for the VPX P2 backplane connector to meet system-specific requirements. In addition to its PCIe Gen.3×8 interface on the VPX P1 connector, it is possible to add up to eight more gigabit serial lanes connected directly to the FPGA for supporting user-installed protocols.
The 54141A supports the emerging VITA 66.5 optical interconnect standard by providing four optical duplex lanes to a mating spring-loaded backplane connector. With the installation of a serial protocol like 10GbE or 40GbE in the FPGA, the interface enables high-bandwidth digital communications between boards or chassis independent of the PCIe interface.
The board can be optioned to support VITA 67.3C. This provides analogue signal routing through the VPX backplane to replace front panel connectors for RF I/O, sample/reference clocks and gate/trigger/sync/PPS signals. This option is often required in ruggedised deployments and for simplifying unit field replacements and upgrades, reports Pentek.
The 54141A uses the Texas Instruments ADC12DJ3200 12-bit ADC with an input bandwidth of 6GHz, which operates in single-channel interleaved mode with a sampling rate of 6.4GHz or in dual-channel mode with a sampling rate of 3.2GHz.
A Texas Instruments DAC38RF82 DAC with DUC accepts a baseband real or complex data stream from the FPGA and delivers it to the interpolation, up conversion and dual D/A stages for output signals up to 4GHz. The two 6.4GHz 14-bit D/As pair well with the dual input channels and deliver more than twice the output performance of earlier Pentek products, says the company.
Factory-installed functions include two A/D acquisition modules and a D/A waveform generation IP module, IP modules for DDR4 SDRAM memories, a controller for all data clocking and synchronisation functions, a test signal generator and a PCIe Gen.3×8 interface. An optional VITA 49.2 data transport protocol IP module conveys digitised signal metadata for signal acquisition and processing elements in communication, radar or storage systems. According to Pentek, the 54141A reduces risk and time-to-market, often without the need to develop FPGA IP.
The Jade Architecture is based on the Xilinx Kintex UltraScale FPGA for cost, power dissipation and weight benefits, says Pentek. The FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data packing, gating, triggering and memory control. A 5Gbyte bank of DDR4 SDRAM is available to the FPGA for custom applications. The x8 PCIe Gen 3 link can sustain 6.4GHz data transfers to system memory. Eight additional gigabit serial lanes and LVDS general purpose I/O lines are available for custom solutions.
Pentek’s Navigator design suite consists of Navigator FDK (FPGA design kit) for integrating custom IP into Pentek sourced designs and Navigator BSP (board support package) for creating host applications. Users can work at the application programming interface (API) level for software development and with an intuitive graphical interface for IP design. The BSP is available for Windows and Linux operating systems. Pentek provides application support to customers at no cost.
