Intel Introduces Tremont, low power x86 CPU microarchitecture
Claimed to be Intel’s most advanced, low power x86 architecture to date, Tremont has been unveiled at the Linley Fall Processor Conference in Santa Clara, California, USA.
It offers “a significant performance boost over prior generations,” said the company.
“We focused on a range of modern, complex workloads, while considering networking, client, browser and battery so that we could raise performance efficiently across the board. It is a world-class CPU architecture designed for enhanced processing power in compact, low power packages,” said Stephen Robinson, Intel Tremont chief architect.
Tremont low-power x86 microarchitecture delivers instructions per cycle (IPC) gains compared with Intel’s earlier low power x86 architectures. It is designed for enhanced processing power in compact, low power packages and it is hoped it will enable innovative form factors for client devices, creative applications for the IoT and efficient data centre products, speculated Intel at the announcement.
Intel Tremont includes several advancements in instruction set architecture (ISA), microarchitecture, security and power management. It has six-wide (two by three clustered) out-of-order decoder in the front end for a more efficient feed to the wider back end.
Using Intel’s 3D packaging technology, Foveros, the 10nm process Tremont will be integrated within a wider set of silicon IPs in Lakefield. There will be 10 execution ports and an L2 cache up to 4.5Mbytes. It offers a performance comparable with Sandy Bridge in a mobile and portable package. Intel is focusing significantly on the single-thread performance and showed some single-thread performance improvement graphs (SPECint* Rate base) relative to Goldmont Plus, reported WCCFTech.
