iWave uses RISC-V for open standard, RZ-Five-based module
Industry leaders are incorporating RISC ISA (reduced instruction set computer instruction set architecture) into designs to meet multiple industries and applications, observed iWave.
The company is a Renesas Synergy partner. Renesas announced the RZ/Five general purpose microprocessors, based on a 64-bit RISC-V CPU core, earlier this year. iWave has introduced system on modules based on Renesas RZ microprocessors and targeting IoT endpoint devices such as gateways.
The iW-RainboW-G53M system on module is based on the Renesas RZ/Five or RZ/G2UL or RZ/A3UL SoC-based LGA modules and designed according to the Open Standard Module (OSM) size-M specification. The modules are compatible with the Arm Cortex-A55 and RISC-V architectures offering customers more choice and broadening product development freedom, said iWave.
The Renesas RZ/Five or RZ/G2UL or RZ/A3UL-based system on modules compatible with Renesas G2UL or A3UL or Five SoCs with the G2UL and A3UL versions supporting Arm’s Cortex-A55 cores. The G2UL model also supports Arm’s Cortex-M33 core for RTOS. The Five version supports the RISC-V Andes AX45MP processor operating at 1.0GHz. The module features two RGMII, two USB 2.0, one MIPI CSI and one RGB.
The OSM Size-M specification standard form factors means the system on module can be soldered directly onto the carrier board, adding an extra level of ruggedness to products prone to vibrations which require a compact form factor.
Despite its compact design, the RZ/Five system on module offers a wide range of services but boasts low power consumption, thermal efficiency, and low cost for embedded systems, said iWave.
RISC-V is an open standard instruction set architecture (ISA) established based on the RISC (Reduced Instruction Set Computing) design principles. It includes fewer sets of predefined instructions, which are easier to understand and code. As a result, RISC chips can perform millions of instructions per second (MIPS).
Unlike other ISA designs, RISC-V is available under an open-source license that delivers a new level of free, extensible software and hardware freedom on architecture. RISC-V is suitable for all computing systems, from a microcontroller to supercomputers, and there is no restriction on its implementation.
