Low voltage SRAM lowers power consumption for edge AI applications
Cutting the supply voltage to logic can deliver power savings but developers face challenges in operating embedded SRAM at this reduced voltage, said SureCore. The issue is edge-AI applications must provide significant inferencing power whilst still delivering acceptable battery life.
SureCore said that it has used its low power design capability to create a range of low voltage SRAM, called PowerMiser Plus, that can operate down to 0.45V, enabling customers to create low power products. Both the logic and memory can interface at the same voltages and can be adjusted in tandem to increase and decrease performance and power consumption simultaneously as required by the application.
PowerMiser Plus has already been licensed to two customers in the edge-AI space amid a wave of increasing interest in SureCore’s low power memory solutions. One customer ported the PowerMiser Plus architecture to a leading 12nm process interfacing to logic operating at 0.45V whilst delivering 400MHz performance at the worst case corner. The SoC had an on-chip LDO generating both the logic supply as well as a 0.65V supply for the SRAM storage arrays. This ensured that as system level shifts in operating voltage were made to meet the required performance targets, reported SureCore. When both supplies tracked each other within a pre-defined margin, the use of power-hungry level shifters within the SRAM were avoided, thereby further optimising power consumption.
For another edge-AI customer, the PowerMiser Plus architecture was optimised to provide a low voltage, single port solution that takes advantage of the low voltage profile of the foundry high current bit cell. Whilst operating at 0.6V nominal and delivering 400MHz worst case, the memory was also characterised to operate at 0.5V providing dramatically extended battery life.
Paul Wells, SureCore’s founder and CEO explained: “More and more customers are responding to market pressures to deliver extended battery lives. In doing so, they can no longer ignore the significant power drain of their embedded SRAM,” he said. “This is especially true in the edge-AI space where pattern matching requires heavy SRAM usage. Key to delivering the power savings demanded is the wholesale shift of the application to a lower operating voltage which is fine for the logic, of course, which can still deliver relatively high performance”.
The PowerMiser Plus architecture has delivered the low voltage solutions needed to hit challenging power targets, Wells added.
SureCore offers a bespoke custom memory development service. Part of this is sureFIT, which delivers memory sub-system solutions optimised for the three-dimensional design space of power, performance and area (PPA).
In addition to a bespoke service, the company also offers a range of power-optimised, standard products, which include Everon, PowerMiser and MiniMiser.
