PICMG releases COM-HPC carrier board design guide
Open embedded computing consortium, PICMG, has announced the COM-HPC (computer-on-module high performance computing) Carrier Board Design Guide. The 160-page document is available on the consortium’s website and includes comprehensive information for designing custom system carrier boards for COM-HPC modules. COM-HPC is a new open CoM form factor standard that targets extremely high I/O and computer performance levels from high end clients up to the entry server class projects. Standard COM-HPC modules plug into a carrier or baseboard that is typically customised to the application. For OEMs, it accelerates layout with high design security for application specific embedded and edge computing boards.
Module to carrier board Ethernet KR and KR4 backplane signalling is addressed by the standard. To save pins on COM-HPC modules, the sideband signals for the 10G / 25G / 40G / 100G Ethernet KR interfaces are serialised and must then be deserialised on the carrier board. The design guide provides instructions for this in a series of diagrams.
Additionally, the guide provides enhanced schematics and block diagrams for all provided interfaces such as Serial ATA, PCI Express up to Gen 5, USB4, Boot SPI, eSPI, eDP, MIPI-CSI, SoundWire, asynchronous serial port interfaces, I2C / I3C, general purpose I/O, System Management Bus (SMBus), thermal protection and module type detection.
The design guide has PCB design rule summaries for engineers to efficiently design signal-compliant COM-HPC carrier boards. There is also a section in the guide around mechanical considerations including heat spreader/module attachment, alternative board stack assemblies and board stiffeners for carrier boards. Information about all COM-HPC interfaces and a list of useful books to facilitate carrier board designs is also included in PICMG’s COM-HPC Carrier Board Design Guide.
The consortium pointed out that while the design guide contains additional detailed information it does not replace the PICMG COM-HPC specification. For complete guidelines on the design of COM-HPC compliant carrier boards and systems, it is necessary to refer to the full specification. It also recommends using the module vendors’ product manuals as a reference. The design guide and base specification are accompanied by a Platform Management Interface Specification, and the COM‑HPC EEEP. The existing Embedded API (eAPI) specification also applies to COM-HPC.
Christian Eder, chairman of the COM-HPC committee, hopes the design guide will “further accelerate the fast start of the COM-HPC standard. While the specification documents in themselves are already of great use for developers, the detailed Carrier Board Design Guide helps to avoid design problems, especially when handling high-speed signals, such as PCIe Gen 5 and USB4,” he said.