ACM Research makes wet wafer processing tools available for OSAT
To meet the advanced technology requirements of outsourced semiconductor assembly and test (OSAT) providers, ACM Research offers its extended portfolio of wet wafer processing tools. The suite of customised, wet wafer processing systems supports advanced wafer level packaging (WLP) processes such as copper (Cu) pillar and gold (Au) bumping, as well as through silicon via (TSV), fan-out and chiplet processes. Tool capabilities span the entire process flow, including cleaning, coating, developing, plating, planarising, photo resist (PR) stripping and etching.
“Today’s wafer-level packages are more complex than those of previous generations and require wet-processing tools with innovative technologies to meet or exceed customers’ criteria,” explained David Wang, CEO and president of ACM Research. ACM’s wet wafer solutions are deployed for both standard and high-density fan-out processes in high volumes, reporting high yields and increased throughput.
According to Yole Développement, advanced packaging is expected to increase from 42.6 per cent in 2019 (as a percentage of the total semiconductor packaging market) to 49.4 per cent in 2025. This growth is attributed to strong momentum in advanced packaging capabilities resulting from the slowing of Moore’s Law, heterogeneous integration, and continued demand for innovation from new applications such as 5G, artificial intelligence (AI), high performance computing (HPC) and the Internet of things (IoT).
ACM Research’s wet wafer processing systems for WLP are compatible with both 200mm and 300mm wafers, and can be implemented for varied applications. For example, in electrochemical plating (ECP), ACM’s ECP ap system has self-developed second anode technology and achieves within less than five per cent wafer uniformity, less than three per cent wafer-to-wafer uniformity, less than two per cent repeatability and less than 2.0 micro within die co-planarity. The system can be configured with up to three load ports, up to four vacuum pre-wet chambers, up to 20 plating chambers and up to four post-clean chambers. The ECP tool can also be customised to meet requirements for critical WLP plating steps, including Cu, nickel (Ni), Sn/Sn-Ag pillar, solder bump, Au bump and Cu redistribution layer applications. ACM’s proprietary diffusion plate and patented rubber seal, also make the tools suitable for fan-out, TSV and through-mould via processing.
The tools can also be used for stress-free polishing (SFP), with a system based on an electrochemical reaction mechanism to remove excess copper and the top barrier layer without inducing mechanical stress.
ACM’s coating system performs photo resist and polyimide coating, soft bake, and the application of hexamethyldisilazane (HMDS) for vapour deposition for WLP lithography processes. Configurations are customisable, with options such as the choice of up to four coating chambers with ACM’s auto-clean function; a variety of different photo resist nozzles, eight to 14 hot plates, two to four cold plates and one or two HMDS auto-clean chambers. The ACM proprietary in situ auto-clean technology in the coating chamber can reduce tool preventive maintenance times, especially in the coating process for photo resist with high thicknesses, even above 100 micron, says ACM.
Other systems are a developer system is designed for post-exposure bake, developing and hard-baking capabilities, ACM’s wet etching system with smart-sequence recipe function, a wet stripping system for photo resist removal processes, and a scrubber system for high particle-removal efficiency for both integrated chip manufacturing and WLP using multiple clean methods.