Allegro unveils safety PMIC to integrate a wheel-speed sensor interface
Allegro has introduced the A81415, the industry’s first ASIL-D-certified Power Management IC (PMIC) to integrate a wheel-speed sensor interface. The new device provides electromechanical braking (EMB) designers with a substantially simplified, single-chip power and sensing foundation for next-generation brake-by-wire systems.
Brake-by-wire is fast becoming a foundational chassis technology in software-defined vehicles. But while much of the automotive industry’s design focus is on centralising compute platforms, the physical act of stopping a vehicle happens at the wheel. This location places a hard set of demands on corner module electronics to deliver fail-operational power and accurate wheel-speed data in tight spaces that are vibration-prone and thermally stressed – all while meeting the highest functional safety bar.
Today, designers are forced to stitch together generic safety PMICs, separate wheel-speed decoders, and clusters of discrete power components. In addition to adding cost and consuming valuable board space, that approach multiplies potential failure points at the exact location where reliability matters most.
With an on-chip wheel-speed sensor interface (WSSI), the A81415 safety PMIC decodes standard 2-level, 2-level Pulse Width Modulation (PWM), and 3-level AK protocols (standard and high-resolution) without complicated analog circuitry or a separate decoder IC. By incorporating a fully integrated buck-boost pre-regulator, five Low-Dropout (LDO) regulators, and a single-inductor architecture that requires no external switches or diodes, the A81415 eliminates up to nine external components and unlocks up to $4 in semiconductor bill-of-materials (BOM) savings per vehicle, delivering meaningful cost advantages at OEM production scale this unprecedented level of integration opens up more than 50% of usable board space to provide the brake calliper with critical design headroom.
Because the physical layer of the wheel-speed data is handled internally by the PMIC and the decoded data is shared over a Serial Peripheral Interface (SPI), the A81415 trims latency in the safety-critical loop and frees MCU bandwidth for faster braking response. Low-noise power rails are explicitly tuned to power Allegro’s XtremeSense TMR angle sensors and ensure the entire commutation and clamping-force signal chain is optimised as one coherent, high-resolution system from wheel to calliper.
True brake-by-wire operation requires components capable of surviving the harshest electrical environments. Built on Allegro’s proprietary automotive grade-0 process and paired with the APM81815 pre-regulator and 48V gate drivers, the A81415 forms a complete, fail-operational chipset. This modular approach provides Tier 1 suppliers with a fast track to migrate proven 12V braking architectures directly to next generation 48V corner modules without redesign or bulky external transient protection.
