Automotive-grade IP is available on TSMC’s N5A process technology

Together, Synopsys and TSMC say they are helping to power the next generation of software-defined vehicles by enabling long-term reliability and high-performance compute requirements of automotive system-on-chips (SoCs). The new Synopsys IP for the TSMC N5A meets automotive Grade 2 temperature and AEC-Q100 requirements to enable high SoC reliability for long-term operation.

It is, said Synopsys, the industry’s broadest portfolio of automotive-grade Interface and Foundation IP for TSMC’s N5A process.

“Synopsys’ portfolio of automotive-grade IP for TSMC’s N5A process enables automotive chip innovators to accelerate the design of their safety-critical SoCs while taking advantage of N5A’s significant performance, power efficiency, and logic density boost,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC.

“New generations of automotive SoC designs will need to support massive amounts of safety-critical data processed at extreme speeds and with high reliability,” commented John Koeter, senior vice president of marketing and strategy for IP at Synopsys. The automotive-grade Interface and Foundation IP on TSMC’s N5A process enables automotive OEMs, Tier 1s, and semiconductor companies to minimise IP integration risk and help meet the required functional safety, performance, and reliability levels for SoCs, he continued.
Synopsys IP on the TSMC N5A process is designed and tested to the AEC-Q100 reliability and automotive Grade 2 temperature standards for ambient -40 to +105 degrees C. These parameters help to ensure reliability of advanced driver assistance systems (ADAS), highly automated driving (HAD) systems, and zonal SoCs, said Synopsys.

The IP portfolio meets the ISO 26262 standard for random hardware faults, enabling automotive OEMs, Tier 1s, and semiconductor companies to accelerate the development and assessment of safety-critical SoCs and reach their designs’ functional safety Automotive Safety Integrity Level (ASIL) targets. Automotive-grade Synopsys IP, which has been integrated into more than 100 ADAS chips, is part of Synopsys’ automotive SoC and software development offering that includes design, verification, electronics digital twin, and prototyping solutions to accelerate development of chips for software-defined vehicles.

Available today, Synopsys Automotive-Grade IP on the TSMC N5A process includes logic libraries, embedded memories, GPIOs, SLM PVT monitors, and PHYs for LPDDR5X / 5 / 4X, PCIe 4.0/5.0, 10G USXGMII Ethernet, MIPI C-PHY / D-PHY and M-PHY and USB.

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