Automotive SoC means processing for autonomous cars is single chip operation
Renesas Electronics says that newly-developed technologies used in the R-Car V3U SoC deliver 60.4 trillion operations per second and 13.8 trillion operations per second per W in convolutional neural network (CNN) processing, which enables the main processing tasks for autonomous driving systems to be implemented on a single chip.
At the International Solid-State Circuits Conference 2021 (ISSCC 2021), taking place this week, Renesas announced the CNN hardware accelerator core and sophisticated safety mechanisms for fast detection of and response to random hardware failures. This makes it possible to create a highly power efficient detection mechanism with a high failure detection rate, says Renesas. The company also announced a mechanism which allows software tasks with different safety levels to operate in parallel on the SoC without interfering with each other. This third development enhances functional safety for ASIL D control in autonomous vehicles. All of these technologies have been applied in the company’s latest R-Car V3U automotive SoC.
In addition to intensive deep learning performance levels and power efficiency, advanced driver assistance systems (ADAS) and autonomous driving requires signal processing from object identification to the issuing of control instructions, adding to the processing load in autonomous vehicle systems. As a result, achieving the functional safety equivalent of ASIL D – the strictest safety level defined in the ISO 26262 automotive safety standard – has become a pressing issue, says Renesas. These technologies have been developed to meet this need, the company added.
There are three CNN hardware accelerator cores on the R-Car V3U with 2-Mbyte of dedicated memory per CNN accelerator core, for a total of 6-Mbyte of memory. This reduces data transfers between external DRAM and the CNN accelerator by more than 90 per cent and successfully achieved a high CNN processing performance of 60.4 trillion operations per second with best-in-class power efficiency of 13.8 trillion operations per second per W, reports Renesas.
The ISO 26262 automotive functional safety standard specifies numerical targets (metrics) for various functional safety levels. The metrics for ASIL D are 99 per cent or above for the single point fault metric (SPFM) and 90 per cent or above for the latent fault metric (LFM), which means that an extremely high detection rate is required for random hardware failures. Renesas has developed safety mechanisms for fast detection of and response to random hardware failures occurring in the SoC overall. Both reduced power consumption and a high failure detection rate are achieved by combining safety mechanisms suited to specific target functions. Incorporating these mechanisms into the R-Car V3U is expected to bring the majority of the SoC’s signal processing into the realm of achieving the ASIL D metrics. An SoC that satisfies the ASIL D metrics is capable of independent self-diagnosis, which reduces the complexity of fault tolerant design in an autonomous driving system.
The company has also developed a support mechanism for freedom from interference (FFI) between software tasks. This helps the vehicle system meet functional safety standards. When software components with different safety levels are present in the system, it is essential to prevent lower-level tasks from causing dependent failures in higher-level tasks. SoC also need to ensure FFI when accessing control registers in various hardware modules and shared memory.
The FFI support mechanism monitors all data flowing through interconnects in the SoC and blocks unauthorised access between tasks. This enables FFI between all tasks operating on the SoC, for it to manage object identification, sensor fusion with radar or LiDAR, route planning, and issuing of control instructions to ASIL D using a single chip.