Board prototypes medium to large ASIC and SoC designs

For ASIC and SOC physical prototyping and hardware emulation, Aldec has developed the HES-VU19PD-ZU7EV. It accommodates designs of about 83M ASIC gates in size.

The HES-VU19PD-ZU7EV uses just two FPGAs for the provision of logic. This simplifies FPGA partitioning and reduces project bring-up time for designs targeting a medium sized ASIC or SoC. For larger designs, four boards can be connected via a high speed backplane (which is scheduled for release later this year) to provide the equivalent of about 332M ASIC gates. It will also be possible to connect up to three backplanes together to accommodate designs of about 996M ASIC gates.

The HES-VU19PD-7U7EV’s logic module FPGAs are both Xilinx’s highest logic capacity FPGA to date, the Virtex UltraScale+ VU19P. The HES board also features a Xilinx Zynq UltraScale+ ZU7EV MPSoC. This MPSoC acts as the host module and has a quad-core Arm Cortex-A53, dual core ARM Cortex-R5 real time processing units and PCIe Gen3 embedded IP.

HES-VU19PD-7U7EV has a PCIe switch device which provides PCIe x16 Gen 3 connections with the logic devices and PCIe x8 Gen 3 connections with the controller FPGA. Other interfaces include QSFP-DD on each of the logic FPGAs and Ethernet (1Gb) and USB on the control FPGA.

The HES board provides five SODIMMs for accommodating external DDR4 memory (two per VU19P and one for the ZU7EV) in addition to NVMe M.2 PCIe for additional SSD storage.

The Virtex UltraScale+ VU19P is intended for ASIC and SoC prototyping,” so the use of two and a powerful Zynq FPGAs allows designers to fast-track ASIC and SoC projects, says the company.

Using the Zynq US+ device as a controller means the HES board can host the testbench for prototyping, added Aldec.

A revision to Aldec’s fully automated and scalable hybrid verification environment for SoC and ASIC designs, HES-DVM, is in the pipeline. This will extend the board’s capabilities with, for example, enhanced debug, said the company, without revealing any further details ahead of its launch.

For quick bring-up of the host connection, Aldec provides a ready-to-use image of the embedded Linux for the ZU7EV device.

A HES Proto-AXI solution is available as an optional extra. Part of Proto-AXI Installer package, it comes with technical documentation and design examples.

The new board also features two FMC connectors for interfacing with daughter cards.

The HES-VU19PD-7U7EV is sampling now with full production scheduled for early Q3.

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