Cadence adds DSP IP cores for always-on applications
Two DSP IP cores for embedded vision and artificial intelligence (AI) have been added to Cadence Design System’s Tensilica Vision DSP family.
The Vision Q8 and Vision P1 DSPs are designed for automotive, mobile and consumer markets. The Cadence Tensilica Vision Q8 DSP delivers what is claimed to be an industry-leading 3.8T operations per second (TOPS), to double performance and memory bandwidth compared to the Tensilica Vision Q7 DSP. It also increases energy efficiency for high-end vision and imaging applications in the automotive and mobile markets. The Tensilica Vision P1 DSP is an energy-efficient DSP, optimised for always-on and smart sensor applications in the consumer market.
Based on the SIMD and VLIW architecture found in the existing Tensilica Vision DSPs, the Vision Q8 and Vision P1 DSPs feature an N-way programming model that preserves software compatibility for an easy migration from earlier Tensilica Vision DSPs with different SIMD widths. Like the rest of the Tensilica Vision DSP family, the Vision Q8 and Vision P1 DSPs support Tensilica Instruction Extension (TIE) language, allowing customers to customise the instruction set. Both DSPs also support Xtensa Neural Network Compiler (XNNC) and the Android Neural Networks API (NNAPI) for neural network support. In addition, they support more than 1,700 OpenCV-based vision library functions, OpenCL and the Halide compiler for computer vision and imaging applications. Both cores are automotive-ready with ASIL B hardware random faults and ASIL D systematic fault certification.
The seventh-generation Tensilica Vision Q8 DSP is optimised for mobile and multi-camera automotive applications. The single core simplifies system design, reducing power by up to 20 per cent, claims Cadence while an up to four-fold improvement in performance for non-convolution layers addresses the AI workload.
The Tensilica Vision P1 DSP is optimised for always-on applications including smart sensors, AR/VR glasses and IoT/smart home devices. The 128-bit SIMD architecture delivers 400G operations per second (GOPS) and offers one third the power and area, compared to the Vision P6 DSP, yet with 20 per cent higher frequency, says Cadence. The architecture is optimised for small memory footprint and operation in low power mode.
The Tensilica Vision Q8 and Vision P1 DSPs support Cadence’s Intelligent System Design strategy. The Tensilica Vision Q8 DSP is available now, while the Tensilica Vision P1 DSP is expected to be available for general release in the second quarter of 2021.