Codasip announces RISC-V processor family for Custom Compute 

A family of configurable RISC-V baseline processors, the 700 family, released by Codasip includes application and embedded cores. The 700 family complements Codasip’s embedded cores and offer a different starting point for higher performance, explained the company. 

Designers can use Codasip Studio to optimise each baseline core for each target use case. The first core in the family is A730, a 64-bit RISC-V application core. This is now available to early access customers

Filip Benna, product manager, comments: “We recognise our customers’ needs to differentiate their products in a straightforward way. By providing different starting points for embedded and application processors, we make it easier to reach the right level of optimisation in a streamlined design process,” he said. 

The 700 family and Codasip Custom Compute will allow designers to optimise at the chip or application level “for unique gains while keeping costs under control,” he added.

Custom Compute can be achieved through architecture optimisation, application profiling, hardware/software co-optimisation, and domain-specific acceleration. 

Custom Compute is based on the modular RISC-V ISA, the processor design automation toolset Codasip Studio, and a range of baseline embedded and application cores.

The 700 family offers high-performance, versatile cores to bring Custom Compute to a range of new applications. As well as being flexible through customisation, the processors are available as off-the-shelf standard configurations for an immediate start. 

Codasip Studio enables different levels of processor optimisation for each use case through advanced profiling. This automated approach improves time to market. 

Codasip will be participating at the RISC-V Summit in Santa Clara, California, USA (07 to 08 November). 

Codasip is a processor technology company enabling SoC developers to differentiate their products for competitive advantage. Customers leverage the transformational potential of the open RISC-V ISA through Codasip’s Custom Compute offering of Codasip Studio design automation tools and a fully open architecture licensing model combine with a range of processor IP that can be easily customised. 

http://www.codasip.com

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