Codasip Announces Studio 7 IP design and customisation software
RISC-V embedded processor IP supplier, Codasip, announces the launch of the 7th generation of Studio, the company’s IP-design and customisation software that allows for fast configuration and optimisation of RISC-V processors, customer-proprietary processor architectures, and their accompanying software development toolchains. RISC-V is an open, free instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration.
Studio 7 adds significant new functionality and features, claims Codasip, making it the most advanced and effective technology on the market for tailoring RISC-V processors to meet application-specific needs. According to Codasip, its engineers have used the Studio design flow to create the broadest portfolio of RISC-V processors in the industry, and they now offer this scope to customers to further customise and extend the RISC-V instruction set, based on the requirements of the algorithms being run.
Studio can be used for processor prototyping for a specific application domain, fast design space exploration, and development of custom extensions using Codasip’s architecture description CodAL language.
Studio then generates hardware and corresponding software development kits that are aware of the custom extensions, including Verilog or VHDL RTL and System Verilog UVM environments, testbenches and synthesis scripts, full compiler toolchain including advanced profiling and debugging tools, and both cycle-accurate and fast instruction-accurate simulation tools.
Some of the new features included with Studio 7 are native support for industry-standard AMBA interfaces, allowing for easy replacement of other processor cores while reusing existing, proven peripheral IP, and IEEE 1149-7-compatible two-wire JTAG to minimise pin-count. There are also improvements in clock-gating for low-power requirements and major updates to Codespace, the optional Eclipse-based IDE, and the underlying software tools, including support for LLVM 5.0.
The Studio 7 processor design and customisation tool suite is available now.
Codasip delivers processor IP and high-level design tools that provide ASIC designers with all the advantages of the RISC-V open-standard ISA, along with the ability to automatically optimise the processor IP. Codasip is a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions, and is committed to open standards for embedded processors.
