Compact 1.6Tbits per second Ethernet PHY connects to 5G, AI and data centres
To meet the demands of increased data centre traffic driven by 5G, cloud services and artificial intelligence (AI) and machine learning (ML) applications, routers, switches and line cards need higher bandwidth, port density and up to 800Gigabit Ethernet (GbE) connectivity, says Microchip. The company has introduced the PM6200 META-DX2L PHY to overcome the signal integrity challenges associated with the industry’s transition to the 112Gbits per second PAM4 serialiser/deserialiser (SerDes) connectivity sufficient to support the latest pluggable optics, system backplanes and packet processors. Claimed to be the industry’s most compact, 1.6Tbits per second, low-power PHY (physical layer) it reduces power per port by 35 per cent compared to its 56Gbit per second PAM4 predecessor, the META-DX1, which was the industry’s first Tbit-scale PHY, said Microchip.
Commenting on the industry’s transition to a 112Gbit per second PAM4 ecosystem for high-density switching, packet processing and optics, The Linley Group’s principal analyst for networking, Bob Wheeler, commented: “Microchip’s META-DX2L is optimised to address these demands by bridging line cards to switch fabrics and multi-rate optics for 100, 400 and 800GbE connectivity”.
The industrial temperature-grade PHY that offers versatile connectivity, allowing for design reuse across applications, for example from a retimer, gearbox or reverse gearbox to a hitless 2:1 multiplexer (mux). The configurable crosspoint and gearbox features make full use of a switch device’s I/O bandwidth to enable the flexible connections necessary for multi-rate cards that support a range of pluggable optics. The low-power PAM4 SerDes enables the PHY to support the next-generation infrastructure interface rate for cloud data centres, AI/ML compute clusters, 5G, and telecom service provider infrastructure, over long-reach direct attach copper (DAC) cables, backplanes, or connections to pluggable optics.
According to Microchip, the META-DX2L is offered in the industry’s smallest package size, with dimensions of 23 x 30mm.
Microchip provides a full set of design-in collateral, reference designs, and evaluation boards to support customers building systems with META-DX2L devices.
Initial META-DX2L devices are expected to sample during Q4 2021.
