Cryptographic IP cores are extreme-speed to encypt at 100s Gbits per second

Two extreme-speed IP cores have been added by Xiphera to its cryptographic IP core portfolio. The AES-GCM and MACsec are the first extreme-speed product variants in Xiphera’s portfolio. They make up the Extreme-Speed Solutions offering and target applications with highest performance requirements, such as encryption of backbone networks or peripheral component interfaces.

Xiphera’s high-speed (H) IP core variants already provide encryption throughput of tens of Gbits per second (Gbps). The extreme-speed (E) variants push performance beyond hundreds of Gbps for a single stream of data, and are more than just simple parallelisations of the H variant, said Xiphera.

AES-GCM mode protects confidentiality and authenticity of communication, for example, in MACsec, IPsec, and TLS protocols. The new extreme-speed AES-GCM IP core utilise wider data widths (e.g., 256 and 512 bits), reaching throughputs of several 100s Gbits per second in modern FPGA and ASIC technologies. Xiphera’s AES-GCM cores have a constant latency for use with timing sensitive protocols and offering full protection against timing-based attacks, reported the company.

Extreme-speed MACsec IP core protects 100Gbits per second MACsec communication. It utilises the new AES-GCM E variants and is compliant with the MACsec protocol using 256-bit AES-GCM. 

Xiphera confirmed it will extend the offering with further speed grades in the future. The 100G MACsec is compatible with timing sensitive protocols and is fully protected against timing attacks.

Finland—based Xiphera designs and implements proven cryptographic security for embedded systems. It offers secure and highly optimised cryptographic IP cores, designed directly for FPGAs and ASICs without software components. The portfolio is designed in-house.

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