CXL smart memory controllers are optimised for data centres
Equipped with DDR memory bandwidth and capacity expansion, the SMC 2000 Compute Express Link (CXL) -based smart memory controllers enable CPUs, GPUs and SoCs to accelerate AI and machine learning performance, said Microchip Technology.
According to Microchip, memory channels on today’s processors mean that traditional, parallel attached memory has reached a plateau. Data centre application workloads require future memory products that can deliver the same high-performance bandwidth, low latency and reliability of today’s parallel-DDR based memory products, says the company. The continuous computational demands of AI and machine learning (ML) workloads, cloud computing and data analytics are limited which has prompted the introduction of the latest additions to Microchip’s serial-attached memory controller portfolio. The SMC 2000 series of CXL smart memory controllers enable CPUs, GPUs and SoCs to use CXL interfaces to connect either DDR4 or DDR5 memory. This delivers more memory bandwidth per core, more memory capacity per core, and lowers the overall total cost of ownership in the data centre by allowing modern CPUs to optimise application workloads, explains the company.
The low-latency SMC 2000 16 x 32G and SMC 2000 8 x 32G memory controllers are designed to CXL 1.1 and CXL 2.0 specifications, DDR4 and DDR5 JEDEC standards and support PCIe 5.0 specification speeds. The SMC 2000 16 x 32G is claimed to be the industry’s highest-capacity controller with 16 lanes operating at 32Gtransfers per second. It supports two channels of DDR4-3200 or DDR5-4800, resulting in a significant reduction in the required number of host CPU or SoC pins per memory channel.
Typical CXL attached memory modules include 512 Gbyte of memory or more, providing an effective mechanism to increase the memory bandwidth available to processing cores. This capacity enables data centre operators to deploy a broader range of ratios for memory to CPU cores depending on the application needs. This typically improves memory utilisation and lowers the total cost of ownership.
Pete Hazen, corporate vice president of Microchip’s Data Center Solutions business unit, said: “We identified CXL as a disruptive technology early on and were integral to the standard’s definition”.
“The CXL Consortium was founded with a vision to deliver to the industry an open standard that would accelerate next-generation data centre performance,” said Siamak Tavallaei, president, CXL Consortium.
Microchip’s SMC 2000 CXL-based memory controllers use CXL connectivity to enable a CPU or SoC to use a broad set of media types with different cost, power and performance metrics without having to integrate a unique memory controller for each different type. For example, using an SMC 2000 controller with DDR-4 memory, advanced CPUs that only directly support DDR5 can now also re-use DDR-4 memory expansion. The dual signature authentication and Trusted Platform support, secure debug, and secure firmware update enable the SMC 2000 CXL-based controller family to meet all critical storage and enterprise application security needs.
The SMC 2000 comes with design-in collateral and the ChipLink diagnostic tool that provides extensive debug, diagnostics, configuration and analysis tools with an intuitive GUI.
The SMC 2000 16 x 32G will sample to select customers in Q3 2022.