ECC DRAM is available for both LPDDR4 and LPDDR4X technologies

Four years after bringing the first DRAM with on-chip ECC in DDR1, DDR2 and DDR3 technologies to the market, Intelligent Memory is expanding the product line with a series of LPDDR4(X) memory components with integrated ECC error-correction capability.

LPDDR4 and LPDDR4X memory-technologies are designed to run at very high speeds in combination with very low operating voltages (on LPDDR4X as low as 0.6V for VDDQ) and power consumption levels. These attributes, however, increase the risk of random bit-flips and can lead to software malfunction or erratic data, advises Intelligent Memory.

ECC error correction has become increasingly important as the deployment of LPDDR4 memory in industrial applications requiring 24/7 continuous operation and minimum downtime, increases and as many automotive electronics such as camera, communication and control devices for ADAS need a maximum level of reliability and stability.

According to Intelligent Memory, JEDEC has not prepared the LPDDR4(X) memory technology to support a x40 or x72 bit wide memory-bus as is normally used to store the parity-bits for ECC operation. As a result, common controllers and CPUs are not able to perform ECC error correction with LPDDR4(X) memory.

Intelligent Memory’s LPDDR4 and LPDDR4X ECC DRAM perform all ECC-related activities inside the memory components. The integrated ECC logic automatically generates, stores and verifies parity-bits held in a separate memory area and any single-bit-errors are corrected before the data output occurs.

The LPDDR4(X) memory components with integrated ECC error-correction capability adhere to the original JEDEC specifications for LPDDR4, including the pin outs and timings, reports the company, enabling engineers to incorporate them into system designs without any special hardware or software adaptions.

Intelligent Memory is providing customers with samples of the new products in 4Gbit and 8Gbit capacity with a x32 organisation (two channels of 16 bits) in an FBGA 200 standard package.

By the end of Q4, 2019, 2Gbit and 4Gbit single-channel x16-bit wide products will also be released, and 2020 will bring even higher capacities of up to 16Gbit in x32 (two channel) followed by 8Gbit in x16 (one channel).

DRAM are designed for industrial applications and support the full -40 to +95 degrees C industrial temperature range. Higher temperature ranges up to +125 degrees C as well as AEC-Q100 automotive products are currently under preparation and will be available on request.

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