Eight-channel ADC, DAC is in small but rugged enclosure

For signal intelligence and communications intelligence (sigint/comint) applications, the Quartz RFCoC Model 6350 is an eight-channel ADC and DAC system which Pentek has packaged in a rugged small form factor enclosure.

Based on the Xilinx Zynq UltraScale+ RFSoC FPGA, the Model 6350 can also be used for military communications, EW countermeasures, radar transceiver, test and measurement, satellite communications, lidar, 5G and LTE wireless applications.

It is the latest product in Pentek’s Quartz RFSoC architecture. Due to popular demand, the company has introduced this Quartz RFSoC product specifically for use in harsh environments. “The Model 6350 is a self-contained system in a small form factor that allows for deployment in rugged installations,” explained Bob Sgandurra, director of Product Management at Pentek.

The QuartzXM eXpress module which is at the heart of the Quartz family, he continued, enables the company to quickly adapt to new form factors. The Model 6350 system provides a ruggedised, weather resistant system for space constrained or remote applications such as pods, unmanned aerial vehicles (UAVs) and antenna masts.

Optimized for size, weight and power (SWaP), the Model 6350 measures 3.53 x 5.65 x 9.57 inches (89 x 143 x 243mm) and weighs just under eight pounds (3.6kg).

It is designed to the IP67 specification (Ingress Protection Code, IEC standard 60529) for dust and water immersion. The internal ‘I-beam’ construction creates a chassis that is both rugged and efficient for moving heat out of the box, says Pentek, making it suitable for deployment in the harshest environments and well matched to conduction cooled installations. The Model 6350 can also be used with an optional fan plate for desktop development.

The Pentek Quartz architecture embodies a streamlined approach to FPGA products, simplifying the design for reduced power and cost, while still providing some of the highest performance FPGA resources available today, says Pentek. The architecuture is supported by Pentek’s Navigator Design Suite tools, to develop and deploy software and FPGA IP for data and signal processing.

The Xilinx Zynq UltraScale+ RFSoC Processor integrates eight RF-class ADCs and DCCs into the Zynq FPGA fabric, with quad ARM Cortex-A53 and dual ARM Cortex-R5 processors, to provide a multi-channel data conversion and processing system in a single chip.

The Model 6350 is pre-loaded with a suite of Pentek IP modules to provide data capture, timing, interface, and processing solutions for many common applications. Modules include DMA engines, DDR4 memory controllers, test signal and metadata generators, data packing and flow control. The board is also supplied pre-installed with IP for triggered radar chirp generator, triggered radar range gate engine, wideband real-time transient capture, flexible multi-mode data acquisition and extended decimation. The Model 6350 can be used immediately with no FPGA development required.

The front end accepts analogue IF or RF inputs on eight external SMA connectors with transformer-coupling to eight 4Gsamples per second 12-bit ADCs delivering either real or complex DDC samples. With additional IP-based decimation filters, the overall DDC decimation is programmable from 2 to 128. The eight DACs accept baseband real or complex data streams from the FPGA’s programmable logic. Each 6.4Gsamples per second 14-bit DAC includes a digital upconverter with independent tuning and interpolations of 1x, 2x, 4x and 8x. Each DAC output is transformer-coupled to an SMA connector.

The Model 6350’s simplified connector scheme provides full access to control, data, and power using environmentally rugged connectors.

The Model 6350 supports eight 28Gbit per second, full duplex optical lanes to a miniature rugged circular connector. Used with the built-in 100 GigE User Datagram Protocol (UDP) interface or a user provided and installed serial protocol, this optical interface enables a high-speed gigabit data streaming path between the Model 6350 and data storage or processing subsystems.

Pentek’s Navigator Design Suite includes Navigator FDK (FPGA Design Kit) for custom IP and Navigator BSP (Board Support Package) to create host software applications.

The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be graphically edited in Xilinx’s Vivado tool suite, with full source code and documentation. Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own. The Navigator FDK Library is AXI-4 compliant, providing a well-defined interface for developing custom IP or integrating IP from other sources.

The Navigator BSP supports Xilinx’s PetaLinux on the Arm processors.

The Model 6350 system is available now. Options for optical interface, FPGA speed grade, and memory are available.


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