Graphcore achieves first-pass silicon using Synopsys IC Compiler II
Synopsys has announced that Graphcore, the creator of Intelligence Processing Unit (IPU) technology, has achieved first-pass silicon success using its IC Compiler II place-and-route tool, which is part of the Synopsys Fusion Platform. The IC Compiler II was used in designing the second generation Colossus MK2 GC200 IPU, which has 59.4 billion transistors, on a 7nm advanced process technology.
To accelerate implementation of the massive AI processor, Graphcore used Synopsys’ RTL-to-GDS flow with power optimisation capabilities and embedded golden signoff technologies like PrimeTime delay calculator, to achieve “superior out of the box PPA [power, performance, area] metrics” and fast design closure.
“Synopsys’s digital full-flow solution with its best-in-class RTL-to-GDS tools, including Design Compiler and IC Compiler II, offers the most comprehensive single-vendor platform, critical to the on-schedule tape out of our latest Colossus IPU,” said Phil Horsfield, vice president of silicon at Graphcore. “We are confident that continued collaboration with Synopsys on IC Compiler II and Fusion Compiler will enable us to push the boundaries of machine intelligence compute,” he added.
Graphcore’s second-generation Colossus GC200 IPU integrates 1,472 independent processor cores and more than 900Mbytes of on-chip memory to deliver parallel processing power for data centre-scale AI applications.
Synopsys’ IC Compiler II has AI-design focused capabilities, including top-level interconnect planning, logic restructuring, congestion-driven mux optimisation and full-flow concurrent clock and data optimisation for highly repetitive, MAC-based topologies which are typical in complex AI accelerator chips.
The native, high capacity data model with adaptive abstraction and distributed implementation can efficiently handle multi-billion instance designs with quick turnaround times. The golden signoff engine backbone, IC Compiler II is claimed to deliver highest correlation and hyper-convergent design, to further accelerate design turnaround time, says Synopsy.
“The design complexity boundaries of AI compute are continuing to be pushed to its limits, such as with Graphcore’s introduction of its latest Colossus IPU,” said Neeraj Kaul, vice president of engineering, Design Group at Synopsys.
Synopsys partners with companies developing electronic products and software applications. It is the world’s 15th largest software company and has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP. It is also growing its leadership in software security and quality solutions.
