Green Hills Software extends RTOS to avionics
Green Hills Software has extended its Integrity RTOS for DO-178C Level A multi-core interference mitigation to Arm Cortex-A72 processor cores. As part of the Integrity-178 Time-Variant Unified Multi-Processing (tuMP) RTOS, the bandwidth allocation and monitoring (BAM) functionality enables software architects to allocate and enforce bandwidth limits to shared resources for each processor core. By guaranteeing access to shared resources based on application requirements or assurance level, BAM effectively mitigates multi-core interference and minimises multi-core worst-case execution time (WCET), says Green Hills. The company has demonstrated application WCET growing eight times longer from just a single interfering core, and up to 13 times longer with three interfering cores.
The BAM interference mitigation functionality monitors and enforces the use of the shared resources as defined by the system integrator. When coupled with Green Hills Software’s multi-core SoC-specific WCET utility libraries, BAM ensures that critical partitions meet their required deadlines while enabling other lower criticality partitions to execute on other cores simultaneously with no impact on the critical applications. This is the case even as the other partitions are modified or as new partitions are introduced into the system, notes Green Hills.
“Green Hills Software has been leading the charge for multicore interference mitigation with [design assurance level A] DAL A-compliant solutions across multiple multicore architectures,” said Dan O’Dowd, founder and chief executive officer of Green Hills Software. There is no other RTOS supplier, says the company, which provides a DO-178C Level A-compliant solution for multi-core interference mitigation that meets the CAST-32A requirements.
Integrity-178 tuMP provides a general solution to multi-core interference mitigation, thereby minimising retesting and verification after any application changes or additions, says the company.
The Integrity-178 tuMP safety- and security-critical RTOS is designed to simultaneously meet DO-178C DAL A and the separation kernel protection profile (SKPP v1.03) as defined by the NSA. The multi-core RTOS has support for any combination of asymmetric multi-processing (AMP), symmetric multi-processing (SMP), and bound multi-processing (BMP). It includes support for running a multi-threaded DO-178C DAL A partition across multiple processor cores in a BMP configuration as required in ARINC 653 Part 1, Supplements 4 and 5, and also SMP configurations as required in ARINC 653 Part 2 Multi-core Service Extensions, Supplements 3 and 4. It is the first RTOS to be certified conformant to the FACE Technical Standard, edition 3.0, and remains the only one which conforms to all three avionics processor architectures (Arm, Intel and Power Architecture), says Green Hills.