IP ecosystem and design environment accelerates FPGA-based design
Software designed to accelerate the development of applications based on low power, small form factor Lattice FPGAs, has been released by the company. The Lattice Propel design environment will empower developers of any skill level to design Lattice FPGA-based applications using components from an IP library that includes a RISC-V processor core and a number of peripherals. The Propel design environment automates application development for developers serving the communications, computing, industrial, automotive, and consumer markets.
To integrate all design software and IP required to develop emerging applications without a learning curve, Lattice Propel’s correct-by-construction development tools automate much of the design process. It combines system hardware and software design into one tool framework, so software developers can begin creating system software before hardware is available and get products to market faster.
“Lattice is providing a robust design environment supporting open standards like RISC-V to enable customers to take advantage of a powerful processor IP ecosystem without getting locked into proprietary technologies and standards,” said Gianluca Mariani, technical manager, Lattice Semiconductor. “When combined with the reprogrammability of FPGAs, the Lattice Propel environment makes it simple to upgrade existing hardware and software to support emerging technology trends and industry standards such as Platform Firmware Resiliency,” he added.
Roger Do, senior product line manager, Lattice Semiconductor, observed: “For novice FPGA developers, the Lattice Propel [graphic user interface] GUI simplifies the design process by enabling them to drag-and-drop IP blocks from the Lattice IP library into their designs; the tool then automates the design layout to incorporate the new IP. For veteran developers, Propel also supports script-level editing for more granular design optimisation or to quickly update existing designs to port them to future Lattice FPGA-powered systems.”
The design environment includes the Lattice Propel Builder. This is a resource-rich system IP integration environment supported by a complete set of GUI and command line tools. Lattice Propel Builder provides customers with access to a robust, regularly updated IP server that allows developers to implement new IP on Lattice FPGA-based designs in a matter of minutes., says the company. The server currently offers eight processor and peripheral IP cores, including a RISC-V RV32I compliant processor core. Lattice claims to be the first supplier of SRAM and flash-based FPGAs to provide access to RISC-V technology in a simple drag-and-drop system builder environment. To simplify the connection and management of IP in more complex systems, all IP cores available through Lattice Propel Builder are compatible with the AMBA on-chip interconnect specification.
Another part of the environment is the Lattice Propel software development kit (SDK). This enables software development to begin before final system hardware is available. Industry-standard software development tools, software libraries, and development board support packages enable developers to build, compile, analyse, and debug the application software.
The Lattice Propel design environment is available to Lattice customers now.