Mentor’s Catapult HLS supports Achronix’s FPGAs
The Siemens EDA company and the eFPGA IP provider announced that it is partnering to provide a link between high-level synthesis and FPGA technology.
Achronix Semiconductor announced the availability of an optimised HLS flow for its FPGA technology products.
The integrated development environment (IDE) enables designers to quickly go from C++ to FPGA using Mentor’s Catapult HLS and Achronix’s ACE design tools, says the company. The HLS was initially used for 5G wireless applications to reduce the overall development effort and improve quality of results, but is suitable for any design targeting Achronix technology, adds the company.
“The combination of Mentor’s powerful Catapult tools and Achronix’s embedded FPGA technology offer a truly unique value proposition for companies that require high performance FPGA technology in their SoC that can be configured using a proven C based design flow,” said Steve Mensor, Achronix’s vice president of marketing.
Ellie Burns, director of marketing, Calypto Systems Division at Mentor, added: “Achronix eFPGA offers a tremendous ability to adapt to late changing and new requirements in a field programmable SoC. Coupled with Catapult HLS and the verification speed of C++, chip designers can now easily go from algorithm change to new low-power, high-performance hardware in days rather than weeks or months.”
The Catapult HLS to Speedcore embedded FPGA technology flow gives designers the ability to make algorithmic changes in late stages of IP development and to optimise the algorithm and the digital micro-architecture. The integrated verification environment allows reuse of the software tests for generated register transfer level (RTL) code, reducing the need for dedicated RTL test benches by more than 80 per cent.
Achronix ACE design tools support Catapult’s RTL constructs and primitives. Currently Achronix libraries for its Speedcore eFPGA products and for its Speedster standalone FPGAs are integrated into the flow.
The Achronix high-density FPGA technology can be used for hardware acceleration applications in data centre compute, networking and storage, 5G wireless infrastructure, network acceleration, advanced driver assistance systems (ADAS) and autonomous vehicles.
Early versions of the design and development environment are available now.
(Picture Credit: Mentor Graphics)
