NXP targets advanced edge applications with the i.MX 95 family

Part of NXP’s SafeAssure portfolio, the i.MX 95 applications processor family uses an advanced heterogeneous domain design. This not only powers safety-enabled platforms but also integrates a real time safety domain.

The i.MX 95 family combines high performance compute, immersive Arm Mali-powered 3D graphics, a new NXP accelerator for machine learning and high speed data processing. The technology is suitable for automotive, industrial, networking, connectivity and advanced human machine interface (HMI), says NXP. The i.MX 95 family also delivers high performance safety and security features, developed in compliance with automotive ASIL-B and industrial SIL-2 functional safety standards and including an integrated EdgeLock secure enclave.

A critical requirement for the next wave of edge applications is advanced processing and machine learning capabilities, with high-speed connectivity, to analyse the environment and make intelligent decisions locally, explained NXP. The i.MX 95 family is the first i.MX applications processor family to integrate NXP’s eIQ Neutron neural processing unit (NPU). It also includes a new image signal processor (ISP), developed by NXP.

“The i.MX 95 family brings unparalleled features and performance to markets like automotive and industrial where security and safety are key,” stated Rafael Sotomayor, executive vice president and general manager of Secure Connected Edge at NXP. He believed that the combination of processing and graphics, integrated heterogeneous safety domain and networking capabilities, will support “ a new generation of safe and secure edge platforms”.

The i.MX 95 family integrates a secure enclave to simplify implementation of security critical functions in edge applications, such as secure boot, cryptography, trust provisioning, and run-time attestation. Combined with NXP’s EdgeLock 2 GO key management services, manufacturers can securely provision i.MX 95 SoC-based products for secure remote management of devices deployed in the field, including secure over the air updates (OTA), said NXP. 

The i.MX 95’s integrated eIQ Neutron NPU is part of a vision processing pipeline for use with multiple camera sensors or network-attached smart cameras. The SoC integrates an NXP ISP supporting a wide array of imaging sensors to enable vision-capable industrial, robotics, medical and automotive applications, all backed by comprehensive NXP developer support. The Arm Mali GPU enables scaling from multi-display automotive infotainment centres to industrial and IoT HMI-based applications.

The multi-core application domain, with up to six Arm Cortex-A55 cores, is complemented by an independent safety domain consisting of Arm Cortex-M7 and Arm Cortex-M33 CPUs for low power, real time and high performance processing. The i.MX 95 family is designed to enable ISO 26262 ASIL-B and SIL-2 IEC 61508 compliant platforms. Its functional safety domain serves as a critical capability for many automotive and industrial applications. The i.MX 95 can be used in automotiv safety critical actions, for example voice warnings, instrumentation and cameras. In industrial factory automation, the functional safety domain helps to ensure that an industrial control system will always return to a pre-determined state, even when rest of the system fails.

The 10GbE and two 1GbE ports will contribute to industry 4.0, automotive connectivity domain controllers and IoT smart home gateways, said NXP. In addition to time sensitive networking (TSN) capabilities, wireless connectivity (Wi-Fi, Bluetooth Low Energy, satellite radio, or 5G) can be added via two independent PCIe ports, a USB 3 port and integrated BSP-level drivers, said NXP.

Other features include NXP’s Energy Flex architecture that enables fine-grained independent power management of Cortex-A applications domain and real time Cortex-M safety domain. This allows developers to run the real-time safety domain at all times for sensor data monitoring. It also allows the powering up of the applications domain only when necessary to minimise system-level energy consumption.

There is also support for LPDDR5 and LPDDR4X DRAM and multiple options, within the family to scale performance and features to suit power, performance, and application requirements.

The i.MX 95 applications processors are expected to begin sampling for lead customers in 2H 2023.


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