Pentek adds 3U VPX software radio to Jade FPGA family
From Pentek comes the newest member of the Jade family of high-performance 3U VPX boards. Model 54821 is based on the Xilinx Kintex Ultrascale FPGA and features three 200 MHz 16-bit A/Ds with three programmable multiband digital downconverters (DDCs) and one digital upconverter (DUC) with two 800 MHz 16-bit D/As.
The Model 54821 is the latest addition to the Pentek 3U VPX architecture with the advanced wideband I/O options afforded by OpenVPX. It takes advantage of three VPX I/O options for RF and optical interconnects through the VPX backplane.
Option -109 involves optical connections based on VITA 66.5 (draft), containing blind-mate MT optical connectors with fixed contacts on the plug-in module and floating displacement on the backplane. Option -111 involves RF connections based on ANSI/VITA 67.2, containing multi-position blind-mate analogue connectors with SMPM contacts. Option -112: RF connections based on ANSI/VITA 67.3 type C, containing multi-position blind mate analogue connectors with SMPM contacts, spring-loaded on the backplane allowing more movement and larger diameter cables for better performance.
This new 3U VPX architecture further expands the options for custom I/O by offering 20 pairs of LVDS connectivity and one 8X gigabit link for serial protocols. Future options for higher density optical and RF connectors are planned as the supporting standards become available.
The VITA 66.5 draft standard calls out blind mate optical connectors with fixed contacts on the plug-in module and floating displacement for the MT ferrule on the backplane. The 3U VPX module uses a single assembly that includes an electro-optical transceiver, a fixed MT ferrule blind mating connector, and the mechanical housing. This eliminates the need for internal optical cables on the plug-in module to ease assembly and save space, says Pentek.
Model 54821 can be populated with a range of Kintex UltraScale FPGAs to match specific requirements of the processing task, spanning from the entry-level KU035 (with 1,700 DSP slices) to the high-performance KU115 (with 5,520 DSP slices).
The KU115 suits demanding modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower-cost FPGA can be installed.
