Renesas launches integrated code generator support for new 32-bit RISC-V MCU with Segger embedded studio
In collaboration with Renesas, Segger has announced that Embedded Studio has now been integrated into the Renesas code generator known as Smart Configurator. This brings end-to-end Segger support for the new R9A02G021 group of MCUs, Renesas’ first 32-bit RISC-V devices for general purpose applications.
The Renesas Smart Configurator enables design engineers to graphically configure all MCU peripherals such as timers, interfaces, and interrupt controllers to generate source code projects ready to build in Segger Embedded Studio. Engineers can take advantage of the excellent code optimisation of the built-in C/C++ compiler and the market-leading debug capabilities of the J-Link debug probes to bring their RISC-V designs to market quickly.
Renesas and Segger partnered on this project from the very beginning to ensure top-of-the-line support for the new MCU.
The Segger ecosystem of development tools for RISC-V includes Embedded Studio (multi-platform IDE with the highly optimising C/C++ SEGGER Compiler), Ozone (full-featured graphical debugger), and SystemView (real-time recording and visualisation tool) as well as programming and debug support with Segger’s J-Link family of debug probes.
For the production phase, Segger’s Flasher family of in-circuit programmers ensure a high yield rate. These production tools inherit programming support for the R9A02G021 group from J-Link. Programming external memories via the microprocessor is supported as well.
