RZ/V microprocessor series has a clear view of AI

Microprocessors in the RZ/V2M series have dynamically reconfigurable processor (DRP) AI, Renesas’ vision-optimised AI accelerator. The RZ/V2M is designed to deliver a combination of real-time AI inference and industry-leading power efficiency in embedded devices, says the company.

The higher power consumption and heat generation of real-time, AI-based person and object recognition functionality in surveillance cameras, product scanners and point of sale terminal cameras has been the catalyst for the development of the microprocessors, revealed Renesas. The RZ/V2M leverages the DRP-AI’s power efficiency to realise power consumption as low as 4W (typical). This eliminates the need for heat sinks and cooling fans, simplifying heat dissipation measures. It also means that the RZ/V2M can be used in compact devices or help to minimise equipment sizes and reduce the bill of materials (BoM) costs, said Renesas.

Hiroto Nitta, senior vice president, head of SoC business, IoT and infrastructure at Renesas, believes: “The RZ/V Series will dramatically expand the range of AI applications in embedded devices through object recognition, for example cameras in smart shopping cart systems that automatically calculate totals based on the cart items, robots in factories that can safely work together with humans, and medical cameras that assist doctors in making diagnoses.”

The RZ/V2M also features an imaging signal processor (ISP) capable of processing high resolution 4K pixels at 30 frames per second. The ISP employs high dynamic range (HDR) functionality capable of handling images with large differences between brightness and darkness, noise reduction functionality and distortion correction functionality to boost precision in recognition. This ensures the ability to produce clear images regardless of factors such as the weather, the time of day, and the installation location.

The DRP-AI vision-optimised AI accelerator is an intellectual property (IP) evolved from the DRP built into Renesas’ RZ/A2M series. To magnify operation processing capabilities, the DRP functionality is combined with an AI-MAC (multiply and accumulate) circuit, for use in applications using AI inference. The IP core is capable of AI processing with approximately 10 times the power efficiency of the DRP, achieving one Tera operations per second per W (1TOPS/W). The DRP can dynamically change the configuration of its operation circuits every clock cycle, enabling the DRP-AI to add the ability to flexibly support evolving AI algorithms. Renesas also plans to offer the DRP-AI Translator, a tool dedicated to simplifying the implementation of user’s learned AI models into embedded devices.

The low power RZ/V2M is equipped with a CPU with dual Arm Cortex-A53 cores with an operating frequency of 1GHz and an H.265/H.264 encoder/decoder. It has support for CMOS sensor interfaces (SLVS-EC and MIPI-CSI) that enable simultaneous input from two cameras and support for high-speed interfaces (USB3.1, PCI-Express and Gigabit-Ethernet) and MIPI-DSI and HDMI display interfaces. It is supplied in a 15 x 15mm FCBGA package.

Samples are available now for early adopters, and mass production is scheduled to start in December 2020.

https://www.renesas.com

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