Embedded processor IP company, Codasip, has released Studio 8, a suite of tools optimised for the development and verification of RISC-V processors. The company also announced it has developed the Bk7 processor, the first Codasip RISC-V core optimised for Linux and real-time performance.

  “As the RISC-V ISA specification evolves and adds an ever-increasing number of optional architecture extensions, a processor design methodology that allows for both rapid architectural exploration and simplified creation of easily implementable RTL becomes essential,” says Chris Jones, vice president of marketing at Codasip.

The company identified that a high-level processor description language optimised for RISC-V was needed; Studio 8 is a suite of tools for RISC-V processor development.

Designers write a high-level description of a processor in CodAL, an architecture description language, and then automatically synthesise the design’s RTL, test bench, virtual platform models, and processor SDK (C/C++ compiler, debugger, profiler). Time that would otherwise be required to maintain a complete software development kit (SDK) and implementation is reduced using the methodology that uses an instruction accurate (IA) processor model in CodAL for SDK generation and a cycle accurate model for implementation.

Codasip employs this silicon-proven methodology to create a broad portfolio of licensable RISC-V processor IP. Studio has evolved to make it more suitable for implementing and extending the instruction set of RISC-V cores, says Codasip. The 8th generation of Studio, adds new functionality and features to tailor RISC-V processors to meet application-specific needs.

Studio 8 includes support for LLVM debugger (LLDB) and OpenOCD, LLVM 7.0, Studio/CodeSpace IDEs, based on Eclipse Oxygen along with more interactive consoles, improved test suites and verification to better support user-defined RISC-V extensions.

Codasip architects employed Studio to develop the Bk7 processor, the latest RISC-V micro-architecture in the company’s portfolio.

The processor is a 64-bit machine featuring a balanced seven-stage pipeline with branch prediction, optional full MMU with virtual addressing support for operating systems such as Linux, and support for the popular RISC-V standard extensions as well as industry-standard external interfaces. The Bk7 is customisable so architects can add additional instructions, registers or interfaces.

The Bk7 provides readable Verilog or VHDL RTL along with test benches and synthesis scripts.  It has an SDK consisting of an LLVM-based compiler, profiling and debugging tools and cycle-accurate and fast instruction-accurate simulation tools.

Studio 8 and the Bk7 processor are generally available in the first quarter of 2019, with early access to selected customers immediately.   

http://www.codasip.com