Synopsys claims ‘breakthrough’ emulation for ZeBu EP1 system

Emulation performance of 10MHz with the ZeBu EP1 emulation system speeds hardware and software verification of complex SoCs in areas such as high-performance computing (HPC), 5G, GPU, artificial intelligence (AI) and automotive development, says Synopsys.

ZeBu EP1 is part of ZeBu, part of Synopsys Verification Continuum Platform, claimed to be the industry’s highest-performance, highest-throughput emulation platform.

It includes the industry’s first 10MHz emulation system, using Synopsys’ proven direct-connect architecture, optimises design communication to accelerate hardware and software verification for SoC designs of up to 2bn gates.

Manoj Gandhi, general manager of the Verification Group at Synopsys, said: “ZeBu EP1 represents the convergence of multiple hardware and software technologies to deliver breakthrough performance and debug. The . . . fast emulation capability . . . is enabling electronics companies to develop and verify the most advanced SoCs with full software stacks.”

Synopsys’ latest generation emulation and prototyping systems incorporate the Xilinx Virtex UltraScale+ VU19P device. The collaboration between Synopsys and Xilinx drives continued innovation on FPGA compile, runtime performance and at-speed debug.

ZeBu also includes the ZeBu Empower emulation system, believed to be the industry’s first SoC power-aware emulation system, enabling multiple iterations per day with actionable power profiling in the context of the full design and its software workload.

Another part if ZeBu System Level Debug, for complex SoCs with billion-cycle software workloads. It leverages high-bandwidth host interface for continuous data streaming and deterministic replay for eliminating redundant emulation runs.

The ZeBu Hybrid Emulation, with Virtualizer virtual prototyping, is supported by an extensive library of virtual processor, memory and interface models, delivers 70 to 100x throughput gain for OS boot enabling more complex software validation and earlier tape-out.

There are also ZeBu Virtual Host and Device models for PCIe 5.0, USB3, SATA, Ethernet, and NVMe which enable validation of the host to device software stack with real OS, driver, and application software of complex SoCs.

ZeBu Simulation Acceleration technology with unified testbench and design compile, and speed optimised protocol transactors provides 100x speed up for simulation for faster RTL regression performance and environment bring up.

Finally there are ZeBu Speed Adapters which connect ZeBu emulation systems to real-world environments for in-circuit emulation (ICE). Based on proven Synopsys DesignWare IP, they support PCIe, CXL 2.0, Ethernet, USB, SATA and display port as well as 5G testers, networking testers and customer specific hardware.

“Computing innovation is happening at a rapid pace across the Arm partner ecosystem,” said Tran Nguyen, senior director of design services, Arm. “As more software-intensive Arm-based HPC, 5G, GPU, AI and automotive applications are developed, there is an increasing demand for faster emulation and accelerated verification, and we continue to work closely with Synopsys to address that need for our mutual customers.”

“Xilinx and Synopsys’ deep technical collaboration over many years has accelerated broad industry adoption of and innovation around FPGA-based emulation and prototyping,” said Vamsi Boppana, senior vice president, Central Products Group at Xilinx.

http://www.synopsys.com

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