Three application processor cores from Codasip support RISC-V P extensions
Three 64-bit RISC-V application processor cores have been released by customisable RISC-V processor IP specialist, Codasip. The A70XP provides support for RISC-V P extensions, the A70X‑MP and A70XP‑MP enable the creation of symmetric multi-processor (SMP) systems.
The RISC-V P extension consists of 331 instructions which can be divided into groups. The A70XP includes a single instruction, multiple data (SIMD) unit which executes P extension instructions with single cycle latency. Multi-cycle instructions are pipelined to allow one to be executed every clock cycle. The core can be used for audio encoding/decoding, sensor fusion, computer vision and edge artificial intelligence/machine learning (AI/ML) applications.
The A70X-MP and A70XP-MP cores add multi-core features to the Codasip application processor family, supporting clusters of up to four cores in an SMP configuration. Codasip provides configurable L1 and L2 caches with a scalable microarchitecture. All three application processors use an AXI external interface (Advanced eXtensible Interface, part of the Arm Advanced Microcontroller Bus Architecture 3 and 4 specifications) and support Linux.
The Application RISC-V processors (denoted by product names beginning with A) are based on the same microarchitecture as the A70X (Codasip Bk7). All the Application cores are 64-bit and feature a floating point unit and Atomic instructions. They also support machine, supervisor and user privilege modes and have a memory management unit (MMU), therefore they are able to run Linux. Like other RISC-V cores by Codasip, they have been are developed using Codasip Studio allowing them to be customised to meet domain-specific requirements.
The cores have been developed as a result of combining skills at Codasip’s new design centre in France and Codasip’s main R&D centre in Brno, in the Czech Republic.
The A70X core is available today and the other three cores will be available in the first quarter of 2021.
Karel Masařík, CEO Codasip, said the company expects to introduce more new products in 2021.
Codasip offers two further processor families for the embedded domain, the small and efficient low power embedded processors and more powerful high performance embedded processors. Both of these families are based on the Codasip Bk3 and Bk5 microarchitectures.
Codasip delivers processor IP and design tools, providing IC designers with all the advantages of the RISC-V open ISA, and can customise the processor IP.
The company is a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions, and is committed to open standards for embedded processors.
Codasip was formed in 2014 and is headquartered in Munich, Germany. There are offices in Europe and China, and sales representatives worldwide.
