Unisantis presents Dynamic Flash Memory as DRAM alternative
Described as a leap forward in the search for a DRAM alternative, Dynamic Flash Memory (DFM) technology has been described at the 13th IEEE International Memory Workshop by Unisantis Electronics.
For low-cost high-density embedded or standalone memory applications, DFM is able to offer faster speeds and higher density when compared to DRAM or other types of volatile memory.
It was presented by its inventors, Dr Koji Sakui and Dr Nozomu Harada, both from Unisantis, in a paper entitled “Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT)”.
The Unisantis vertical SGT technology offers several key characteristics to the resulting circuit implementation, says the company. In addition to improved area density in comparison with planar and FinFET transistors, it has reduced leakage power, due to the strong electrostatic control of the surrounding gate to the transistor channel. The transistor width and length dimensions are optimised for the end application, in terms of either high-performance or low power dissipation.
DRAM is a volatile, capacitor-based, destructive-read form of memory which has faced the challenge of increasing storage while reducing cost and without increasing power consumption. DFM offers an alternative to overcome the limitations of conventional volatile memory such as DRAM, with inherent short, regular and power-hungry refresh cycles, as well as destructive read processes.
DFM is also a type of volatile memory, but since it does not rely on capacitors it has fewer leak paths. It has no connection between switching transistors and a capacitor. The result is a cell design with the potential for significant increases in transistor density and, because it not only offers block refresh, but as a flash memory it offers block erase. DFM reduces the frequency and the overhead of the refresh cycle and is capable of delivering significant improvements in speed and power compared to DRAM, says Unisantis.
By utilising TCAD simulation, the company has proved DFM has a substantial potential to increase density four-fold compared to DRAM. The scaling of DRAM has almost stopped at 16Gbit, according to recent IEEE ISSCC (International Solid-State Circuits Conference) papers.
The design and development of DFM means significant Gbit per mm2 improvements, and today’s limits on DRAM (currently 16Gbit) could immediately see increases to 64Gbit memory using DFM’s radically enhanced cell structure.
