VESA DSC IP lowers power to extend battery life, says Synopsys

Video Electronics Standards Association (VESA) display stream compression (DSC) encoder and decoder IP from Synopsys reduces video and image interface data rates, to lower power and extend battery life.

Synopsys has added the DesignWare IP for visually lossless compression across display interfaces, in particular mobile, augmented reality/virtual reality (AR/VR) and automotive SoCs.

The DesignWare VESA DSC IP interoperates with Synopsys’ DesignWare HDMI 2.1, DisplayPort, and MIPI DSI IP to provide a display solution that complies with the latest VESA DSC 1.1 and 1.2a standards. The DesignWare VESA DSC IP enables embedded and external displays to deliver the required 120Hz refresh rate, high dynamic range, and wide colour gamut for up to 10K, high-definition content, to meet the demands of devices with more powerful visual capabilities and richer graphics experiences. Synopsys is an active member of the VESA standards body, and is helping to drive adoption and interoperability of the VESA DSC standard in the display ecosystem. By providing DSC IP, the company helps designers build more powerful, high-end display SoCs.

The DesignWare VESA DSC IP can be used to increase pixel throughput without needing to redesign existing SoC architectures. A single instance of the IP can be shared across HDMI, DisplayPort, and MIPI DSI interfaces to further reduce power and area. The configurable IP transmits compressed data, distributed across up to 16 parallel slices in real time, to meet the high-performance requirements of target applications.

The IP lowers power consumption by reducing video and image interface data rates, as well as video buffer size for extended battery life.

The complete display solution, including DesignWare VESA DSC Encoder and Decoder, HDMI 2.1, DisplayPort, and MIPI DSI IP, is available now. VC Verification IP for DisplayPort with support for VESA DSC is also available now.

Synopsys provides silicon-proven IP solutions for SoC designs. The DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems.

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