Visual tool streamlines SystemVerilog and VHDL design workflow
HDL design developer, Sigasi, has announced Studio XPRT, which has been integrated into the next-generation version of the Sigasi Studio 4.0, the company’s integrated development environment (IDE).
Studio XPRT is designed to streamline workflow and boost productivity for SystemVerilog and VHDL designers. It has been integrated into the next-generation version of the Sigasi Studio 4.0, the company’s integrated development environment (IDE). Sigasi will showcase Studio 4.0 which offers advanced programming assistance for hardware design and verification teams, and Studio XPRT at the Moscone Center, San Francisco 24 to 28 June 2018.
According to Sigasi, the introduction of Studio XPRT gives hardware design and verification engineers new code editing, checking and browsing features to lower the time spent reviewing and validating their projects.
Sigasi Studio improves productivity for FPGA and ASIC designers by providing support to write, inspect and modify digital circuit designs intuitively. It marks syntax errors so they can be immediately fixed. By understanding the HDL languages Sigasi Studio can support advanced features such as intelligent auto-completes and code refactoring, making Verilog, VHDL and SystemVerilog design entry easier and more efficient, claims the company.
Studio XPRT has integrated visual feedback and graphical navigation features with a flexible integrated documentation feature within Sigasi Studio 4.0. All SystemVerilog and VHDL users now will have access to features with block diagrams, finite state machine and hierarchy views, confirms the company. These views will help users validate code faster, get insights within their project and make reuse of legacy code much easier. Studio XPRT works with unfinished code and delivers with immediate (‘type-time’) feedback.
Hendrik Eeckhaut, CTO, Sigasi, commented: “The improvements in Sigasi Studio 4.0 are timely as customers wrestle with crucial compliance standards like ISO 26262 and DO-254. Customers are reporting significant drops in the time spent reviewing and validating their projects as they comply with standards like these.”
Sigasi Studio dramatically improves the FPGA and ASIC designer’s productivity by providing support to write, inspect and modify digital circuit designs intuitively. As you type, Sigasi Studio marks syntax errors so they can be immediately fixed. By understanding the HDL languages Sigasi Studio can support advanced features such as intelligent auto-completes and code refactoring, making Verilog, VHDL and SystemVerilog design entry easier and more efficient. Sigasi Studio has become the essential next-generation Intelligent Development Environment (IDE) for hardware designers.
Sigasi will be at Booth 2351 at the Design Automation Conference.
