Xilinx extends Versal ACAP with fast memory and secure connectivity
The latest in Xilinx’s Versal ACAP series, Versal HBM, is claimed to deliver fast memory, secure connectivity and adaptable computing. The adaptive compute acceleration platform (ACAP) has high bandwidth memory (HBM) and is intended for used in data centres and by network operators.
According to Xilinx, the Versal HBM ACAPs integrate the most advanced HBM2e DRAM, providing 820Gbyte per second throughput and 32Gbyte of capacity for eight times more memory bandwidth and 63 per cent lower power than DDR5 implementations. The Versal HBM series has been designed to address the increased memory needs of compute intensive, memory bound applications for data centres, wired networking, test and measurement, and aerospace and defence projects.
The Versal HBM series eliminate bottlenecks which result from memory bandwidth limitations as well as power and thermal performance limits, explained Sumit Shah, senior director, product management and marketing at Xilinx.
The Versal HBM devices build on the Versal Premium series, with power-optimised networking cores for high bandwidth and secure connectivity, explains Xilinx. Versal HBM series offers 5.6Tbits per second serial bandwidth with 112Gbits per second PAM4 transceivers, 2.4Tbits per second scalable Ethernet bandwidth, 1.2Tbits per second of line rate encryption throughput, 600Gbits per second of Interlaken connectivity, and 1.5Tbits per second of PCIe Gen5 bandwidth with built-in DMA, supporting both CCIX and CXL.
The IP suite means that the ACAP can address multi-terabit network connectivity for a breadth of protocols, data rates, and optical standards, despite being an off-the-shelf solution which can reduce time to market.
The Versal HBM adaptive, heterogeneous compute platform accelerates workloads with large data sets, integrating adaptable engines for low latency hardware parallelism, DSP engines for AI inference and signal processing, and scalar engines for embedded compute, platform management, and secure boot and configuration. Unlike fixed function accelerators, the Versal HBM series can dynamically reconfigure hardware in milliseconds and adapt with evolving algorithms and emerging protocols, explains Xilinx. This eliminates the need for hardware redesign and re-deployment.
Versal HBM can process large data workloads for fraud detection, recommendation engines, database acceleration, data analytics, financial modeling, and deep learning inference for natural language processing (NLP). It not only improves runtimes by orders of magnitude over modern server class CPUs, it also supports data sets that are four times larger, says Xilinx.
They are also able to deliver network scalability and performance for 800G routers, switches, and security appliances. A traditional network processing unit (NPU) implementation of 800G firewall would require multiple NPU devices and DDR modules, whereas a single Versal HBM ACAP eliminates external memories and performs packet processing, security processing, and adaptable AI-infused anomaly detection at dramatically lower power and in a smaller form factor.
Versal HBM ACAPs provide a design-entry point for any developer, including Vivado Design Suite for hardware developers, the Vitis unified software platform for software developers, and Vitis AI for data scientists with domain-specific frameworks and acceleration libraries and acceleration libraries.
The Versal HBM series will begin sampling in the first half of 2022. Documentation is available now and tools will be available in the second half of 2021 via an early access program.