Xilinx increases bandwidth and compute density for Versal ACAP
The third generation Versal ACAP from Xilinx is claimed to have the highest bandwidth, highest compute density available for network and cloud acceleration.
Versal Premium is the third series in the Versal ACAP (Adaptive Compute Acceleration Platform) portfolio. It has highly integrated, networked and power-optimised cores and what is claimed to be the industry’s highest bandwidth and compute density on an adaptable platform. Versal Premium is designed for the highest bandwidth networks operating in thermally and spatially constrained environments, as well as for cloud providers who need scalable, adaptable application acceleration.
Versal is developed on TSMC’s 7nm process technology and combines software programmability with dynamically configurable hardware acceleration, pre-engineered connectivity and security features to accelerate time-to-market. The Versal Premium series delivers up to three times higher throughput compared to current generation FPGAs, with built-in Ethernet, Interlaken and cryptographic engines that enable fast and secure networks. The series doubles the compute density of currently deployed mainstream FPGAs and can be adapted to keep pace with evolving cloud and networking workloads.
The Versal Premium series addresses these challenges by delivering up to 9Tbits per second of scalable, adaptable serial bandwidth. This is achieved by using 112G PAM4 transceivers and integrated connectivity for core, metro and data centre interconnect (DCI) infrastructure that doubles bandwidth density per port and reduce latency by up to 50 per cent.
Versal Premium has 112Gbits per second PAM4 transceivers, multi-hundred Gbit Ethernet and Interlaken connectivity, high speed cryptography, and PCIe Gen5 with built-in DMA, supporting both CCIX and CXL. It is designed for use with the Vitis unified software platform and Vivado design suite.
Channelized Ethernet cores deliver up to 5Tbits per second of throughput in a minimised footprint and high-speed cryptography engines provide up to 1.6Tbits per second of encrypted line-rate throughput and support for AES-GCM-256/128, MACsec, and IPsec.
The Versal Premium series has over 120Tbyte per second of on-chip memory bandwidth, coupled with the customisable memory hierarchy to reduce data movement to remove key bottlenecks. Pre-engineered connectivity and cores allow drop-in integration into existing cloud infrastructure.
The Versal Premium series will begin sampling with early access customers in the first half of 2021.
