Deep learning ASIC is in production qualification
Independent FinFET-class ASIC, custom IP and 2.5D packaging provider, eSilicon, has announced that the deep learning ASIC that taped out last September has moved to production qualification.
The ASIC includes custom pseudo two-port memories designed by eSilicon, TSMC’s Chip on Wafer on Substrate (CoWoS) technology, 28G SerDes, and four second-generation High-Bandwidth Memory (HBM2) stacks. eSilicon’s end-to-end 2.5D/HBM2 structure includes 2.5D ecosystem management, silicon-proven HBM2 PHY, ASIC physical design, 2.5D package design, manufacturing, assembly and test.
The CoWoS interposer is over 1,000 square mm and contains over 170,000 microbumps. The design has successfully passed test bring-up and is in final qualification, reports eSilicon. Four-high and eight-high HBM stack versions are in qualification. This design is in the industry vanguard of ASICs targeting deep learning applications, says eSilicon.
The 2.5D/HBM2 single package implementation gives the ASIC advantages such as orders of magnitude higher total bandwidth in a much smaller board footprint. Another benefit, says eSilicon, is that it affords highly parallel connections to memory stacks inside the package for fast access and a “significant” reduction in power consumption.
“This design greatly expands the possibilities for deep learning, and we are delighted to enter final qualification,” said Ajay Lalwani, vice president, global manufacturing operations at eSilicon. “TSMC’s 2.5D CoWoS packaging technology has been a key differentiater for this advanced design.”
As well as complex FinFET-class ASICs, custom IP and advanced 2.5D packaging solutions, eSilicon provides complete 2.5D/HBM2 and TCAM platforms for FinFET technology at 14,16 and 17nm as well as SerDes, specialised memory compilers and I/O libraries. It has a patented knowledge base and optimisation technology that it provides to customers serving the high-bandwidth networking, high-performance computing, artificial intelligence and 5G infrastructure markets.
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Picture credit – TSMC foundry
